Macros
#define	RESET_BIT 0

#define	FEED_HOLD_BIT 0

#define	CYCLE_START_BIT 0

#define	ESTOP_BIT 0

#define	SAFETY_DOOR_BIT 0

#define	MOTOR_FAULT_BIT 0

#define	MOTOR_WARNING_BIT 0

#define	PROBE_DISCONNECT_BIT 0

#define	STOP_DISABLE_BIT 0

#define	BLOCK_DELETE_BIT 0

#define	SINGLE_BLOCK_BIT 0

#define	LIMITS_OVERRIDE_BIT 0

#define	AUX_CONTROLS_ENABLED 1

#define	AUX_CONTROLS_SCAN 0

#define	CONTROL_MASK (RESET_BIT\|FEED_HOLD_BIT\|CYCLE_START_BIT\|ESTOP_BIT\|PROBE_DISCONNECT_BIT\|STOP_DISABLE_BIT\|BLOCK_DELETE_BIT\|SINGLE_BLOCK_BIT\|MOTOR_FAULT_BIT\|MOTOR_WARNING_BIT\|LIMITS_OVERRIDE_BIT)

#define	CONTROL_MASK_SUM (RESET_BIT+FEED_HOLD_BIT+CYCLE_START_BIT+ESTOP_BIT+PROBE_DISCONNECT_BIT+STOP_DISABLE_BIT+BLOCK_DELETE_BIT+SINGLE_BLOCK_BIT+MOTOR_FAULT_BIT+MOTOR_WARNING_BIT+LIMITS_OVERRIDE_BIT)

#define	QEI_A_BIT 0

#define	QEI_B_BIT 0

#define	QEI_SELECT_BIT 0

#define	MPG_MODE_BIT 0

#define	I2C_STROBE_BIT 0

#define	SPINDLE_INDEX_BIT 0

#define	SPINDLE_PULSE_BIT 0

#define	SPI_IRQ_BIT 0

#define	DEVICES_IRQ_MASK (MPG_MODE_BIT\|I2C_STROBE_BIT\|QEI_SELECT_BIT\|SPI_IRQ_BIT\|SPINDLE_INDEX_BIT\|QEI_A_BIT\|QEI_B_BIT)

#define	DEVICES_IRQ_MASK_SUM (MPG_MODE_BIT+I2C_STROBE_BIT+QEI_SELECT_BIT+SPI_IRQ_BIT+SPINDLE_INDEX_BIT+QEI_A_BIT+QEI_B_BIT)

#define	AUXINPUT0_BIT 0

#define	AUXINPUT1_BIT 0

#define	AUXINPUT2_BIT 0

#define	AUXINPUT3_BIT 0

#define	AUXINPUT4_BIT 0

#define	AUXINPUT5_BIT 0

#define	AUXINPUT6_BIT 0

#define	AUXINPUT7_BIT 0

#define	AUXINPUT_MASK (AUXINPUT0_BIT\|AUXINPUT1_BIT\|AUXINPUT2_BIT\|AUXINPUT3_BIT\|AUXINPUT4_BIT\|AUXINPUT5_BIT\|AUXINPUT6_BIT\|AUXINPUT7_BIT)

#define	AUXINPUT_MASK_SUM (AUXINPUT0_BIT+AUXINPUT1_BIT+AUXINPUT2_BIT+AUXINPUT3_BIT+AUXINPUT4_BIT+AUXINPUT5_BIT+AUXINPUT6_BIT+AUXINPUT7_BIT)

Typedefs
typedef bool(*	aux_claim_explicit_ptr) (aux_ctrl_t *aux_ctrl)

Macro Definition Documentation

◆ AUX_CONTROLS_ENABLED

#define AUX_CONTROLS_ENABLED 1

◆ AUX_CONTROLS_SCAN

#define AUX_CONTROLS_SCAN 0

◆ AUXINPUT0_BIT

#define AUXINPUT0_BIT 0

◆ AUXINPUT1_BIT

#define AUXINPUT1_BIT 0

◆ AUXINPUT2_BIT

#define AUXINPUT2_BIT 0

◆ AUXINPUT3_BIT

#define AUXINPUT3_BIT 0

◆ AUXINPUT4_BIT

#define AUXINPUT4_BIT 0

◆ AUXINPUT5_BIT

#define AUXINPUT5_BIT 0

◆ AUXINPUT6_BIT

#define AUXINPUT6_BIT 0

◆ AUXINPUT7_BIT

#define AUXINPUT7_BIT 0

◆ AUXINPUT_MASK

◆ AUXINPUT_MASK_SUM

#define AUXINPUT_MASK_SUM (AUXINPUT0_BIT+AUXINPUT1_BIT+AUXINPUT2_BIT+AUXINPUT3_BIT+AUXINPUT4_BIT+AUXINPUT5_BIT+AUXINPUT6_BIT+AUXINPUT7_BIT)

◆ BLOCK_DELETE_BIT

#define BLOCK_DELETE_BIT 0

◆ CONTROL_MASK

◆ CONTROL_MASK_SUM

#define CONTROL_MASK_SUM (RESET_BIT+FEED_HOLD_BIT+CYCLE_START_BIT+ESTOP_BIT+PROBE_DISCONNECT_BIT+STOP_DISABLE_BIT+BLOCK_DELETE_BIT+SINGLE_BLOCK_BIT+MOTOR_FAULT_BIT+MOTOR_WARNING_BIT+LIMITS_OVERRIDE_BIT)

◆ CYCLE_START_BIT

#define CYCLE_START_BIT 0

◆ DEVICES_IRQ_MASK

◆ DEVICES_IRQ_MASK_SUM

#define DEVICES_IRQ_MASK_SUM (MPG_MODE_BIT+I2C_STROBE_BIT+QEI_SELECT_BIT+SPI_IRQ_BIT+SPINDLE_INDEX_BIT+QEI_A_BIT+QEI_B_BIT)

◆ ESTOP_BIT

#define ESTOP_BIT 0

◆ FEED_HOLD_BIT

#define FEED_HOLD_BIT 0

◆ I2C_STROBE_BIT

#define I2C_STROBE_BIT 0

◆ LIMITS_OVERRIDE_BIT

#define LIMITS_OVERRIDE_BIT 0

◆ MOTOR_FAULT_BIT

#define MOTOR_FAULT_BIT 0

◆ MOTOR_WARNING_BIT

#define MOTOR_WARNING_BIT 0

◆ MPG_MODE_BIT

#define MPG_MODE_BIT 0

◆ PROBE_DISCONNECT_BIT

#define PROBE_DISCONNECT_BIT 0

◆ QEI_A_BIT

#define QEI_A_BIT 0

◆ QEI_B_BIT

#define QEI_B_BIT 0

◆ QEI_SELECT_BIT

#define QEI_SELECT_BIT 0

◆ RESET_BIT

#define RESET_BIT 0

◆ SAFETY_DOOR_BIT

#define SAFETY_DOOR_BIT 0

◆ SINGLE_BLOCK_BIT

#define SINGLE_BLOCK_BIT 0

◆ SPI_IRQ_BIT

#define SPI_IRQ_BIT 0

◆ SPINDLE_INDEX_BIT

#define SPINDLE_INDEX_BIT 0

◆ SPINDLE_PULSE_BIT

#define SPINDLE_PULSE_BIT 0

◆ STOP_DISABLE_BIT

#define STOP_DISABLE_BIT 0

Typedef Documentation

◆ aux_claim_explicit_ptr

typedef bool(* aux_claim_explicit_ptr) (aux_ctrl_t *aux_ctrl)

Macros

Typedefs