grblHAL core  20260411
pin_bits_masks.h
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1 /*
2  pin_bits_masks.h - for adding bit definitions and masks
3 
4  NOTE: This file is not used by the core, it may be used by drivers
5 
6  Part of grblHAL
7 
8  Copyright (c) 2021-2026 Terje Io
9 
10  grblHAL is free software: you can redistribute it and/or modify
11  it under the terms of the GNU General Public License as published by
12  the Free Software Foundation, either version 3 of the License, or
13  (at your option) any later version.
14 
15  grblHAL is distributed in the hope that it will be useful,
16  but WITHOUT ANY WARRANTY; without even the implied warranty of
17  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18  GNU General Public License for more details.
19 
20  You should have received a copy of the GNU General Public License
21  along with grblHAL. If not, see <http://www.gnu.org/licenses/>.
22 */
23 
24 #include "platform.h"
25 
26 // Sanity checks
27 
28 #if PROBE_ENABLE && !defined(PROBE_PIN)
29 #error "Probe input is not supported in this configuration!"
30 #endif
31 
32 #if SAFETY_DOOR_ENABLE && !defined(SAFETY_DOOR_PIN)
33 #error "Safety door input is not supported in this configuration!"
34 #endif
35 
36 #if MOTOR_FAULT_ENABLE && !defined(MOTOR_FAULT_PIN)
37 #error "Motor fault input is not supported in this configuration!"
38 #endif
39 
40 #if MOTOR_WARNING_ENABLE && !defined(MOTOR_WARNING_PIN)
41 #error "Motor warning input is not supported in this configuration!"
42 #endif
43 
44 #if I2C_STROBE_ENABLE && !defined(I2C_STROBE_PIN)
45 #error "I2C keypad/strobe is not supported in this configuration!"
46 #endif
47 
48 #if MPG_ENABLE == 1 && !defined(MPG_MODE_PIN)
49 #error "MPG mode input is not supported in this configuration!"
50 #endif
51 
52 #if (ENCODER_ENABLE & 1) && !defined(QEI_SELECT_PIN)
53 #error "Encoder select input is not supported in this configuration!"
54 #endif
55 
56 #define EXPANDER_PORT 1
57 
58 // Control input signals
59 
60 // Define the CONTROL_PORT symbol as a shorthand in the *_map.h file if all control inputs share the same port.
61 #ifdef CONTROL_PORT
62 
63 #ifndef RESET_PORT
64 #define RESET_PORT CONTROL_PORT
65 #endif
66 #ifndef FEED_HOLD_PORT
67 #define FEED_HOLD_PORT CONTROL_PORT
68 #endif
69 #ifndef CYCLE_START_PORT
70 #define CYCLE_START_PORT CONTROL_PORT
71 #endif
72 #ifndef ESTOP_PORT
73 #define ESTOP_PORT CONTROL_PORT
74 #endif
75 #ifndef PROBE_DISCONNECT_PORT
76 #define PROBE_DISCONNECT_PORT CONTROL_PORT
77 #endif
78 #ifndef STOP_DISABLE_PORT
79 #define STOP_DISABLE_PORT CONTROL_PORT
80 #endif
81 #ifndef BLOCK_DELETE_PORT
82 #define BLOCK_DELETE_PORT CONTROL_PORT
83 #endif
84 #ifndef SINGLE_BLOCK_PORT
85 #define SINGLE_BLOCK_PORT CONTROL_PORT
86 #endif
87 #ifndef MOTOR_FAULT_PORT
88 #define MOTOR_FAULT_PORT CONTROL_PORT
89 #endif
90 #ifndef MOTOR_WARNING_PORT
91 #define MOTOR_WARNING_PORT CONTROL_PORT
92 #endif
93 #ifndef LIMITS_OVERRIDE_PORT
94 #define LIMITS_OVERRIDE_PORT CONTROL_PORT
95 #endif
96 #if SAFETY_DOOR_ENABLE && !defined(SAFETY_DOOR_PORT)
97 #define SAFETY_DOOR_PORT CONTROL_PORT
98 #endif
99 
100 #endif // CONTROL_PORT
101 
102 #ifndef SD_DETECT_BIT
103 #ifdef SD_DETECT_PIN
104 #define SD_DETECT_BIT (1<<SD_DETECT_PIN)
105 #else
106 #define SD_DETECT_BIT 0
107 #endif
108 #endif
109 
110 #ifndef CONTROL_ENABLE
111 #define CONTROL_ENABLE 0
112 #endif
113 
114 #define a_cap(pin) .cap.pin
115 
116 #if defined(ESP_PLATFORM) || defined(RP2040) || defined(__IMXRT1062__)
117 #define add_aux_input(fn, aux, irq, signal_bit) { .function = fn, .irq_mode = irq, .signal.value = signal_bit, .port = IOPORT_UNASSIGNED, .gpio.pin = aux##_PIN },
118 #else
119 #define add_aux_input(fn, aux, irq, signal_bit) { .function = fn, .irq_mode = irq, .signal.value = signal_bit, .port = IOPORT_UNASSIGNED, .gpio.port = (void *)aux##_PORT, .gpio.pin = aux##_PIN },
120 #endif
121 #if defined(__IMXRT1062__) // || defined(ESP_PLATFORM)
122 #define add_aux_output(fn, aux) { .function = fn, .port = IOPORT_UNASSIGNED, .gpio.pin = aux##_PIN },
123 #else
124 #define add_aux_output(fn, aux) { .function = fn, .port = IOPORT_UNASSIGNED, .gpio.port = (void *)aux##_PORT, .gpio.pin = aux##_PIN },
125 #endif
126 #define add_aux_input_scan(fn, irq, signal_bit) { .function = fn, .irq_mode = irq, .signal.value = signal_bit, .port = IOPORT_UNASSIGNED, .gpio.pin = 0xFF, .scan = On },
127 #define add_aux_motor_input(fn, motor, aux, irq) { .function = fn##motor, .irq_mode = irq, .port = IOPORT_UNASSIGNED, .gpio.port = (void *)motor##_##aux##_PORT, .gpio.pin = motor##_##aux##_PIN },
128 #define add_aux_input_no_signal(fn, irq) { .function = fn, .irq_mode = irq, .port = IOPORT_UNASSIGNED, .gpio.pin = 0xFE },
129 #define add_aux_output_exp(fn, aux) { .function = fn, .port = IOPORT_UNASSIGNED, .gpio.port = (void *)aux##_PORT, .gpio.pin = aux##_PIN },
130 
131 static aux_ctrl_t aux_ctrl[] = {
132 // The following pins are bound explicitly to aux input pins.
133 #ifdef RESET_PIN
134  #if (CONTROL_ENABLE & CONTROL_ESTOP)
135  add_aux_input(Input_EStop, RESET, IRQ_Mode_RisingFalling, SIGNALS_ESTOP_BIT)
136  #elif (CONTROL_ENABLE & CONTROL_RESET)
137  add_aux_input(Input_Reset, RESET, IRQ_Mode_RisingFalling, SIGNALS_RESET_BIT)
138  #endif
139 #endif
140 #if (CONTROL_ENABLE & CONTROL_FEED_HOLD) && defined(FEED_HOLD_PIN)
141  add_aux_input(Input_FeedHold, FEED_HOLD, IRQ_Mode_RisingFalling, SIGNALS_FEEDHOLD_BIT)
142 #endif
143 #if (CONTROL_ENABLE & CONTROL_CYCLE_START) && defined(CYCLE_START_PIN)
144  add_aux_input(Input_CycleStart, CYCLE_START, IRQ_Mode_RisingFalling, SIGNALS_CYCLESTART_BIT)
145 #endif
146 #if SAFETY_DOOR_ENABLE && defined(SAFETY_DOOR_PIN)
147  add_aux_input(Input_SafetyDoor, SAFETY_DOOR, IRQ_Mode_RisingFalling, SIGNALS_SAFETYDOOR_BIT)
148 #endif
149 #if MOTOR_FAULT_ENABLE && defined(MOTOR_FAULT_PIN)
150  add_aux_input(Input_MotorFault, MOTOR_FAULT, IRQ_Mode_RisingFalling, SIGNALS_MOTOR_FAULT_BIT)
151 #else
152 #if defined(X_MOTOR_FAULT_PIN)
154 #endif
155 #if defined(Y_MOTOR_FAULT_PIN)
157 #endif
158 #if defined(Z_MOTOR_FAULT_PIN)
160 #endif
161 #if defined(A_MOTOR_FAULT_PIN)
163 #endif
164 #if defined(B_MOTOR_FAULT_PIN)
166 #endif
167 #if defined(C_MOTOR_FAULT_PIN)
169 #endif
170 #if defined(U_MOTOR_FAULT_PIN)
172 #endif
173 #if defined(V_MOTOR_FAULT_PIN)
175 #endif
176 #if defined(W_MOTOR_FAULT_PIN)
178 #endif
179 #if defined(X2_MOTOR_FAULT_PIN)
181 #endif
182 #if defined(Y2_MOTOR_FAULT_PIN)
184 #endif
185 #if defined(Z2_MOTOR_FAULT_PIN)
187 #endif
188 #endif // MOTOR_FAULT_ENABLE
189 #if MOTOR_WARNING_ENABLE && defined(MOTOR_WARNING_PIN)
190  add_aux_input(Input_MotorWarning, MOTOR_WARNING, IRQ_Mode_RisingFalling, SIGNALS_MOTOR_WARNING_BIT)
191 #endif
192 #if I2C_STROBE_ENABLE && defined(I2C_STROBE_PIN)
194 #endif
195 #if MPG_ENABLE == 1 && defined(MPG_MODE_PIN)
197 #endif
198 #if QEI_ENABLE && defined(QEI_A_PIN) && defined(QEI_B_PIN)
201 #endif
202 #if (ENCODER_ENABLE & 1) && defined(QEI_SELECT_PIN)
204 #endif
205 // Probe pins can be bound explicitly and can be "degraded" to not interrupt capable.
206 #if PROBE_ENABLE && defined(PROBE_PIN)
208 #endif
209 #if PROBE2_ENABLE && defined(PROBE2_PIN)
211 #endif
212 #if TOOLSETTER_ENABLE && defined(TOOLSETTER_PIN)
214 #endif
215 
216 // The following pins are allocated from remaining aux inputs pool
217 #if TOOLSETTER_ENABLE && !defined(TOOLSETTER_PIN)
219 #endif
220 #if PROBE2_ENABLE && !defined(PROBE2_PIN)
222 #endif
223 #if TLS_OVERTRAVEL_ENABLE
225 #endif
226 #if LIMITS_OVERRIDE_ENABLE
227  add_aux_input_scan(Input_LimitsOverride, IRQ_Mode_None, SIGNALS_LIMITS_OVERRIDE_BIT)
228 #endif
229 #if STOP_DISABLE_ENABLE
230  add_aux_input_scan(Input_StopDisable, IRQ_Mode_Change, SIGNALS_STOPDISABLE_BIT)
231 #endif
232 #if BLOCK_DELETE_ENABLE
233  add_aux_input_scan(Input_BlockDelete, IRQ_Mode_Change, SIGNALS_BLOCKDELETE_BIT)
234 #endif
235 #if SINGLE_BLOCK_ENABLE
236  add_aux_input_scan(Input_SingleBlock, IRQ_Mode_Change, SIGNALS_SINGLE_BLOCK_BIT)
237 #endif
238 #if PROBE_DISCONNECT_ENABLE
239  add_aux_input_scan(Input_ProbeDisconnect, IRQ_Mode_Change, SIGNALS_PROBE_CONNECTED_BIT)
240 #endif
241 };
242 
243 
244 // General inputs
245 
246 #ifdef STM32_PLATFORM
247 
248 static inline aux_ctrl_t *aux_ctrl_get_fn (aux_gpio_t gpio)
249 {
250  aux_ctrl_t *ctrl_pin = NULL;
251 
252  if(sizeof(aux_ctrl) / sizeof(aux_ctrl_t)) {
253  uint_fast8_t idx;
254  for(idx = 0; ctrl_pin == NULL && aux_ctrl[idx].gpio.pin != 0xFF && idx < sizeof(aux_ctrl) / sizeof(aux_ctrl_t); idx++) {
255  if(aux_ctrl[idx].gpio.pin == gpio.pin && aux_ctrl[idx].gpio.port == gpio.port)
256  ctrl_pin = &aux_ctrl[idx];
257  }
258  }
259 
260  return ctrl_pin;
261 }
262 
263 #endif // STM32_PLATFORM
264 
265 static inline xbar_t *aux_ctrl_claim_port (aux_ctrl_t *aux_ctrl)
266 {
267  xbar_t *pin = NULL;
268 
269  if(aux_ctrl) {
270  if(aux_ctrl->port != IOPORT_UNASSIGNED && (pin = ioport_claim(Port_Digital, Port_Input, &aux_ctrl->port, NULL))) {
271  aux_ctrl->gpio.port = pin->port;
272  aux_ctrl->gpio.pin = pin->pin;
273  if(ioport_set_function(pin, aux_ctrl->function, &aux_ctrl->signal))
274  pin->function = aux_ctrl->function;
275  } else
276  aux_ctrl->port = IOPORT_UNASSIGNED;
277  }
278 
279  return pin;
280 }
281 
282 static inline aux_ctrl_t *aux_ctrl_remap_explicit (aux_gpio_t gpio, uint8_t port, void *input)
283 {
284  int_fast8_t idx;
285  aux_ctrl_t *ctrl_pin = NULL;
286 
287  if(sizeof(aux_ctrl) / sizeof(aux_ctrl_t)) {
288  for(idx = 0; ctrl_pin == NULL && idx < sizeof(aux_ctrl) / sizeof(aux_ctrl_t) && aux_ctrl[idx].gpio.pin != 0xFF; idx++) {
289  if(aux_ctrl[idx].gpio.pin == gpio.pin && aux_ctrl[idx].gpio.port == gpio.port) {
290  ctrl_pin = &aux_ctrl[idx];
291  ctrl_pin->port = port;
292  ctrl_pin->input = input;
293  break;
294  }
295  }
296  }
297 
298  return ctrl_pin;
299 }
300 
301 static inline aux_ctrl_t *aux_ctrl_in_get (uint8_t port)
302 {
303  aux_ctrl_t *ctrl_pin = NULL;
304 
305  uint_fast8_t idx = sizeof(aux_ctrl) / sizeof(aux_ctrl_t);
306 
307  if(idx) do {
308  if(aux_ctrl[--idx].port == port)
309  ctrl_pin = &aux_ctrl[idx];
310  } while(idx && ctrl_pin == NULL);
311 
312  return ctrl_pin;
313 }
314 
315 static inline void aux_ctrl_irq_enable (settings_t *settings, ioport_interrupt_callback_ptr aux_irq_handler)
316 {
317  uint_fast8_t idx = sizeof(aux_ctrl) / sizeof(aux_ctrl_t);
318 
319  if(idx) do {
320  if(aux_ctrl[--idx].port != 0xFF && aux_ctrl[idx].irq_mode != IRQ_Mode_None) {
321  if(!(xbar_is_probe_in(aux_ctrl[idx].function) || xbar_is_encoder_in(aux_ctrl[idx].function))) {
322  pin_irq_mode_t irq_mode;
323  if((irq_mode = aux_ctrl[idx].irq_mode) & IRQ_Mode_RisingFalling)
324  irq_mode = (settings->control_invert.mask & aux_ctrl[idx].signal.mask) ? IRQ_Mode_Falling : IRQ_Mode_Rising;
325  hal.port.register_interrupt_handler(aux_ctrl[idx].port, irq_mode, aux_irq_handler);
326  }
327  }
328  } while(idx);
329 }
330 
331 typedef bool (*aux_claim_explicit_ptr)(aux_ctrl_t *aux_ctrl);
332 
333 // Default/internal functions for aux_ctrl_claim_ports()
334 
335 static bool __claim_in_port (xbar_t *properties, uint8_t port, void *data)
336 {
337  if(ioport_claim(Port_Digital, Port_Input, &port, NULL)) {
338  ((aux_ctrl_t *)data)->port = port;
339  ((aux_ctrl_t *)data)->gpio.port = properties->port;
340  ((aux_ctrl_t *)data)->gpio.pin = properties->pin;
341  ioport_set_function(properties, ((aux_ctrl_t *)data)->function, &((aux_ctrl_t *)data)->signal);
342  }
343 
344  return ((aux_ctrl_t *)data)->port != IOPORT_UNASSIGNED;
345 }
346 
347 static bool __find_in_port (xbar_t *properties, uint8_t port, void *data)
348 {
349  ((aux_ctrl_t *)data)->port = port;
350 
351  return true;
352 }
353 
354 #ifdef USE_EXPANDERS
355 
356 static bool __find_in_ext (xbar_t *properties, uint8_t port, void *data)
357 {
358  bool ok;
359 
360  if((ok = properties->pin == ((aux_ctrl_t *)data)->gpio.pin)) // TODO: check for direct access and config functions?
361  ((aux_ctrl_t *)data)->port = port;
362 
363  return ok;
364 }
365 
366 #endif
367 
368 // --
369 
370 static inline void aux_ctrl_claim_ports (aux_claim_explicit_ptr aux_claim_explicit, ioports_enumerate_callback_ptr aux_claim)
371 {
372  uint_fast8_t idx;
373 
374  if(aux_claim == NULL)
375  aux_claim = __claim_in_port;
376 
377  if(sizeof(aux_ctrl)) for(idx = 0; idx < sizeof(aux_ctrl) / sizeof(aux_ctrl_t); idx++) {
378 #ifdef USE_EXPANDERS
379  if(aux_ctrl[idx].gpio.port == (void *)EXPANDER_PORT) {
380  if(ioports_enumerate(Port_Digital, Port_Input, (pin_cap_t){ .irq_mode = aux_ctrl[idx].irq_mode, .external = On, .claimable = On }, __find_in_ext, &aux_ctrl[idx])) {
381  if((aux_ctrl[idx].input = ioport_claim(Port_Digital, Port_Input, &aux_ctrl[idx].port, NULL))) {
382  ioport_set_function((xbar_t *)aux_ctrl[idx].input, aux_ctrl[idx].function, NULL);
383  aux_claim_explicit(&aux_ctrl[idx]);
384  }
385  }
386  } else
387 #endif
388  if(aux_ctrl[idx].port != IOPORT_UNASSIGNED)
389  aux_claim_explicit(&aux_ctrl[idx]);
390  else {
391 
392  pin_cap_t cap = { .irq_mode = aux_ctrl[idx].irq_mode, .claimable = On };
393 
394  // Toolsetter and Probe2
395  if(aux_ctrl[idx].gpio.pin == 0xFE && ioports_enumerate(Port_Digital, Port_Input, cap, __find_in_port, (void *)&aux_ctrl[idx]))
396  aux_claim_explicit(&aux_ctrl[idx]);
397 
398 #ifdef STM32_PLATFORM
399  if(aux_ctrl[idx].irq_mode == IRQ_Mode_None && !(xbar_is_probe_in(aux_ctrl[idx].function) || aux_ctrl[idx].function == Input_LimitsOverride))
400  continue;
401 #endif
402  if(aux_ctrl[idx].gpio.pin == 0xFF) {
403  if(ioports_enumerate(Port_Digital, Port_Input, cap, aux_claim, (void *)&aux_ctrl[idx]))
404  hal.signals_cap.mask |= aux_ctrl[idx].signal.mask;
405  }
406  }
407  }
408 }
409 
410 static inline control_signals_t aux_ctrl_scan_status (control_signals_t signals)
411 {
412 #if PROBE_DISCONNECT_ENABLE || STOP_DISABLE_ENABLE || BLOCK_DELETE_ENABLE || SINGLE_BLOCK_ENABLE || LIMITS_OVERRIDE_ENABLE
413 
414  uint_fast8_t idx = sizeof(aux_ctrl) / sizeof(aux_ctrl_t);
415 
416  if(idx) do {
417  if(!aux_ctrl[--idx].scan)
418  break;
419  signals.mask &= ~aux_ctrl[idx].signal.mask;
420  if(aux_ctrl[idx].port != IOPORT_UNASSIGNED) {
421  #ifdef GRBL_ESP32 // Snowflake guru workaround
422  if(hal.port.wait_on_input(Port_Digital, aux_ctrl[idx].port, WaitMode_Immediate, FZERO) == 1)
423  signals.mask |= aux_ctrl[idx].signal.mask;
424  #else
425  if(hal.port.wait_on_input(Port_Digital, aux_ctrl[idx].port, WaitMode_Immediate, 0.0f) == 1)
426  signals.mask |= aux_ctrl[idx].signal.mask;
427  #endif
428  }
429  } while(idx);
430 
431 #endif
432 
433  return signals;
434 }
435 
436 #if defined(__IMXRT1062__) || defined(ESP_PLATFORM)
437 /*
438 #ifndef STEPPERS_ENABLE_PORT
439 #define STEPPERS_ENABLE_PORT 0
440 #endif
441 */
442 #if defined(SPINDLE_ENABLE_PIN) && !defined(SPINDLE_ENABLE_PORT)
443 #define SPINDLE_ENABLE_PORT 0
444 #endif
445 #if defined(SPINDLE_DIRECTION_PIN) && !defined(SPINDLE_DIRECTION_PORT)
446 #define SPINDLE_DIRECTION_PORT 0
447 #endif
448 #if defined(SPINDLE_PWM_PIN) && !defined(SPINDLE_PWM_PORT)
449 #define SPINDLE_PWM_PORT 0
450 #endif
451 
452 #if defined(SPINDLE1_ENABLE_PIN) && !defined(SPINDLE1_ENABLE_PORT)
453 #define SPINDLE1_ENABLE_PORT 0
454 #endif
455 #if defined(SPINDLE1_DIRECTION_PIN) && !defined(SPINDLE1_DIRECTION_PORT)
456 #define SPINDLE1_DIRECTION_PORT 0
457 #endif
458 #if defined(SPINDLE1_PWM_PIN) && !defined(SPINDLE1_PWM_PORT)
459 #define SPINDLE1_PWM_PORT 0
460 #endif
461 
462 #if defined(COOLANT_FLOOD_PIN) && !defined(COOLANT_FLOOD_PORT)
463 #define COOLANT_FLOOD_PORT 0
464 #endif
465 #if defined(COOLANT_MIST_PIN) && !defined(COOLANT_MIST_PORT)
466 #define COOLANT_MIST_PORT 0
467 #endif
468 
469 #if defined(COPROC_RESET_PIN) && !defined(COPROC_RESET_PORT)
470 #define COPROC_RESET_PORT 0
471 #endif
472 #if defined(COPROC_BOOT0_PIN) && !defined(COPROC_BOOT0_PORT)
473 #define COPROC_BOOT0_PORT 0
474 #endif
475 
476 #if defined(SPI_RST_PIN) && !defined(SPI_RST_PORT)
477 #define SPI_RST_PORT 0
478 #endif
479 
480 #endif
481 
482 
483 // The following pins are bound explicitly to aux output pins
484 static aux_ctrl_out_t aux_ctrl_out[] = {
485 #if defined(ESP_PLATFORM) || defined(RP2040) // for now
486 #if defined(STEPPERS_ENABLE_PIN) && STEPPERS_ENABLE_PORT == EXPANDER_PORT
487  add_aux_output_exp(Output_StepperEnable, STEPPERS_ENABLE)
488 #endif
489 #if defined(X_ENABLE_PIN) && X_ENABLE_PORT == EXPANDER_PORT
491 #endif
492 #if defined(X2_ENABLE_PIN) && X2_ENABLE_PORT == EXPANDER_PORT
494 #endif
495 #if defined(Y_ENABLE_PIN) && Y_ENABLE_PORT == EXPANDER_PORT
497 #endif
498 #if defined(Y2_ENABLE_PIN) && Y2_ENABLE_PORT == EXPANDER_PORT
500 #endif
501 #if defined(XY_ENABLE_PIN) && XY_ENABLE_PORT == EXPANDER_PORT
503 #endif
504 #if defined(Z_ENABLE_PIN) && Z_ENABLE_PORT == EXPANDER_PORT
506 #endif
507 #if defined(Z2_ENABLE_PIN) && Z2_ENABLE_PORT == EXPANDER_PORT
509 #endif
510 #if defined(A_ENABLE_PIN) && A_ENABLE_PORT == EXPANDER_PORT
512 #endif
513 #if defined(B_ENABLE_PIN) && B_ENABLE_PORT == EXPANDER_PORT
515 #endif
516 #if defined(C_ENABLE_PIN) && C_ENABLE_PORT == EXPANDER_PORT
518 #endif
519 #if defined(U_ENABLE_PIN) && U_ENABLE_PORT == EXPANDER_PORT
521 #endif
522 #if defined(V_ENABLE_PIN) && V_ENABLE_PORT == EXPANDER_PORT
524 #endif
525 #endif //
526 
527 #ifdef SPINDLE_ENABLE_PIN
529 #endif
530 #ifdef SPINDLE_PWM_PIN
532 #endif
533 #ifdef SPINDLE_DIRECTION_PIN
534  add_aux_output(Output_SpindleDir, SPINDLE_DIRECTION)
535 #endif
536 #ifdef SPINDLE1_ENABLE_PIN
538 #endif
539 #ifdef SPINDLE1_DIRECTION_PIN
540  add_aux_output(Output_Spindle1Dir, SPINDLE1_DIRECTION)
541 #endif
542 #ifdef SPINDLE1_PWM_PIN
543  add_aux_output(Output_Spindle1PWM, SPINDLE1_PWM)
544 #endif
545 #ifdef COOLANT_FLOOD_PIN
547 #endif
548 #ifdef COOLANT_MIST_PIN
550 #endif
551 #ifdef COPROC_RESET_PIN
552  add_aux_output(Output_CoProc_Reset, COPROC_RESET)
553 #endif
554 #ifdef COPROC_BOOT0_PIN
555  add_aux_output(Output_CoProc_Boot0, COPROC_BOOT0)
556 #endif
557 #if defined(SPI_RST_PIN) && defined(RP2040)
558  add_aux_output(Output_SPIRST, SPI_RST)
559 #endif
560 };
561 
562 static inline aux_ctrl_out_t *aux_out_remap_explicit (aux_gpio_t gpio, uint8_t port, void *output)
563 {
564  aux_ctrl_out_t *ctrl_pin = NULL;
565 
566  uint_fast8_t idx = sizeof(aux_ctrl_out) / sizeof(aux_ctrl_out_t);
567 
568  if(idx) do {
569  idx--;
570  if(aux_ctrl_out[idx].gpio.port == gpio.port && aux_ctrl_out[idx].gpio.pin == gpio.pin) {
571  ctrl_pin = &aux_ctrl_out[idx];
572  ctrl_pin->port = port;
573  ctrl_pin->output = output;
574  }
575  } while(idx && ctrl_pin == NULL);
576 
577  return ctrl_pin;
578 }
579 
580 typedef bool (*aux_claim_explicit_out_ptr)(aux_ctrl_out_t *aux_ctrl);
581 
582 // Default functions for aux_ctrl_claim_out_ports()
583 
584 static bool __claim_out_port (xbar_t *properties, uint8_t port, void *data)
585 {
586 #ifdef USE_EXPANDERS
587  if(((aux_ctrl_out_t *)data)->gpio.port == (void *)EXPANDER_PORT) {
588  if(((aux_ctrl_out_t *)data)->gpio.pin == properties->pin && properties->set_value)
589  ((aux_ctrl_out_t *)data)->port = port;
590  } else
591 #endif
592  if(ioport_claim(Port_Digital, Port_Output, &port, xbar_fn_to_pinname(((aux_ctrl_out_t *)data)->function)))
593  ((aux_ctrl_out_t *)data)->port = port;
594 
595  return ((aux_ctrl_out_t *)data)->port != IOPORT_UNASSIGNED;
596 }
597 
598 static bool ___claim_out_port_explicit (aux_ctrl_out_t *aux_ctrl)
599 {
600  xbar_t *pin;
601 
602  if((pin = ioport_claim(Port_Digital, Port_Output, &aux_ctrl->port, NULL)))
603  ioport_set_function(pin, aux_ctrl->function, NULL);
604  else
605  aux_ctrl->port = IOPORT_UNASSIGNED;
606 
607  return aux_ctrl->port != IOPORT_UNASSIGNED;
608 }
609 
610 //
611 
612 static inline void aux_ctrl_claim_out_ports (aux_claim_explicit_out_ptr aux_claim_explicit, ioports_enumerate_callback_ptr aux_claim)
613 {
614  uint_fast8_t idx;
615 
616  if(aux_claim == NULL)
617  aux_claim = __claim_out_port;
618 
619  if(aux_claim_explicit == NULL)
620  aux_claim_explicit = ___claim_out_port_explicit;
621 
622  if(sizeof(aux_ctrl_out)) for(idx = 0; idx < sizeof(aux_ctrl_out) / sizeof(aux_ctrl_out_t); idx++) {
623 #ifdef USE_EXPANDERS
624  if(aux_ctrl_out[idx].gpio.port == (void *)EXPANDER_PORT) {
625  if(ioports_enumerate(Port_Digital, Port_Output, (pin_cap_t){ .external = On, .claimable = On }, aux_claim, &aux_ctrl_out[idx])) {
626  if((aux_ctrl_out[idx].output = ioport_claim(Port_Digital, Port_Output, &aux_ctrl_out[idx].port, NULL))) {
627  if(ioport_set_function((xbar_t *)aux_ctrl_out[idx].output, aux_ctrl_out[idx].function, NULL))
628  aux_claim_explicit(&aux_ctrl_out[idx]);
629  }
630  }
631  } else
632 #endif
633  if(aux_ctrl_out[idx].gpio.pin == 0xFF) {
634  if(ioports_enumerate(Port_Digital, Port_Output, (pin_cap_t){ .claimable = On }, aux_claim, &aux_ctrl_out[idx]))
635  aux_claim_explicit(&aux_ctrl_out[idx]);
636  } else if(aux_ctrl_out[idx].port != IOPORT_UNASSIGNED)
637  aux_claim_explicit(&aux_ctrl_out[idx]);
638  }
639 }
640 
641 // Output Signals
642 
643 #if defined(SPINDLE_ENABLE_PIN) && !defined(SPINDLE_ENABLE_BIT)
644 #define SPINDLE_ENABLE_BIT (1<<SPINDLE_ENABLE_PIN)
645 #endif
646 #if defined(SPINDLE_DIRECTION_PIN) && !defined(SPINDLE_DIRECTION_BIT)
647 #define SPINDLE_DIRECTION_BIT (1<<SPINDLE_DIRECTION_PIN)
648 #endif
649 
650 #if defined(SPINDLE1_ENABLE_PIN) && !defined(SPINDLE1_ENABLE_BIT)
651 #define SPINDLE1_ENABLE_BIT (1<<SPINDLE1_ENABLE_PIN)
652 #endif
653 #if defined(SPINDLE1_DIRECTION_PIN) && !defined(SPINDLE1_DIRECTION_BIT)
654 #define SPINDLE1_DIRECTION_BIT (1<<SPINDLE1_DIRECTION_PIN)
655 #endif
656 
657 #if defined(COOLANT_FLOOD_PIN) && !defined(COOLANT_FLOOD_BIT)
658 #define COOLANT_FLOOD_BIT (1<<COOLANT_FLOOD_PIN)
659 #endif
660 #if defined(COOLANT_MIST_PIN) && !defined(COOLANT_MIST_BIT)
661 #define COOLANT_MIST_BIT (1<<COOLANT_MIST_PIN)
662 #endif
663 
664 #if defined(RTS_PIN) && !defined(RTS_BIT)
665 #define RTS_BIT (1<<RTS_PIN)
666 #endif
667 
668 #if defined(RS485_DIR_PIN) && !defined(RS485_DIR_BIT)
669 #define RS485_DIR_BIT (1<<RS485_DIR_PIN)
670 #endif
671 
672 // IRQ enabled input singnals
673 /*
674 #if QEI_ENABLE
675 #ifndef QEI_A_BIT
676 #define QEI_A_BIT (1<<QEI_A_PIN)
677 #endif
678 #ifndef QEI_B_BIT
679 #define QEI_B_BIT (1<<QEI_B_PIN)
680 #endif
681 #else*/
682 #define QEI_A_BIT 0
683 #define QEI_B_BIT 0
684 //#endif
685 
686 #ifndef QEI_SELECT_BIT
687 #define QEI_SELECT_BIT 0
688 #endif
689 #ifndef MPG_MODE_BIT
690 #define MPG_MODE_BIT 0
691 #endif
692 #ifndef I2C_STROBE_BIT
693 #define I2C_STROBE_BIT 0
694 #endif
695 
696 // Do NOT #define PROBE_BIT 0 here!
697 
698 #if SPINDLE_ENCODER_ENABLE
699 #ifndef SPINDLE_PULSE_PIN
700 //#error "Spindle encoder requires at least SPINDLE_PULSE_PIN defined in the board map!"
701 #endif
702 #if !defined(SPINDLE_PULSE_BIT) && defined(SPINDLE_PULSE_PIN)
703 #define SPINDLE_PULSE_BIT (1<<SPINDLE_PULSE_PIN)
704 #endif
705 #if !defined(SPINDLE_INDEX_BIT) && defined(SPINDLE_INDEX_PIN)
706 #define SPINDLE_INDEX_BIT (1<<SPINDLE_INDEX_PIN)
707 #endif
708 #endif
709 
710 #ifndef SPINDLE_INDEX_BIT
711 #define SPINDLE_INDEX_BIT 0
712 #endif
713 #ifndef SPINDLE_PULSE_BIT
714 #define SPINDLE_PULSE_BIT 0
715 #endif
716 
717 #if SPINDLE_ENCODER_ENABLE && (SPINDLE_INDEX_BIT + SPINDLE_PULSE_BIT) == 0
718 #error "Spindle encoder requires SPINDLE_PULSE_PIN and SPINDLE_INDEX_PIN defined in the board map!"
719 #endif
720 
721 #ifndef SPI_IRQ_PIN
722 #define SPI_IRQ_BIT 0
723 #elif !defined(SPI_IRQ_BIT)
724 #define SPI_IRQ_BIT (1<<SPI_IRQ_PIN)
725 #endif
726 
727 #ifndef DEVICES_IRQ_MASK
728 #define DEVICES_IRQ_MASK (SPI_IRQ_BIT|SPINDLE_INDEX_BIT|QEI_A_BIT|QEI_B_BIT|SD_DETECT_BIT)
729 #define DEVICES_IRQ_MASK_SUM (SPI_IRQ_BIT+SPINDLE_INDEX_BIT+QEI_A_BIT+QEI_B_BIT+SD_DETECT_BIT)
730 #endif
731 
732 #ifdef STM32_PLATFORM
733 
734 // Used for validating pins that requires IRQ capabilities
735 
736 #ifdef RESET_PIN
737 #define RESET_BIT (1<<RESET_PIN)
738 #else
739 #define RESET_BIT 0
740 #endif
741 
742 #ifdef FEED_HOLD_PIN
743 #define FEED_HOLD_BIT (1<<FEED_HOLD_PIN)
744 #else
745 #define FEED_HOLD_BIT 0
746 #endif
747 
748 #ifdef CYCLE_START_PIN
749 #define CYCLE_START_BIT (1<<CYCLE_START_PIN)
750 #else
751 #define CYCLE_START_BIT 0
752 #endif
753 
754 #ifdef PROBE_DISCONNECT_PIN
755 #define PROBE_DISCONNECT_BIT (1<<PROBE_DISCONNECT_PIN)
756 #else
757 #define PROBE_DISCONNECT_BIT 0
758 #endif
759 
760 #ifdef STOP_DISABLE_PIN
761 #define STOP_DISABLE_BIT (1<<STOP_DISABLE_PIN)
762 #else
763 #define STOP_DISABLE_BIT 0
764 #endif
765 
766 #ifdef BLOCK_DELETE_PIN
767 #define BLOCK_DELETE_BIT (1<<BLOCK_DELETE_PIN)
768 #else
769 #define BLOCK_DELETE_BIT 0
770 #endif
771 
772 #ifdef SINGLE_BLOCK_PIN
773 #define SINGLE_BLOCK_BIT (1<<SINGLE_BLOCK_PIN)
774 #else
775 #define SINGLE_BLOCK_BIT 0
776 #endif
777 
778 #ifdef MOTOR_FAULT_PIN
779 #define MOTOR_FAULT_BIT (1<<MOTOR_FAULT_PIN)
780 #else
781 #define MOTOR_FAULT_BIT 0
782 #endif
783 
784 #ifdef MOTOR_WARNING_PIN
785 #define MOTOR_WARNING_BIT (1<<MOTOR_WARNING_PIN)
786 #else
787 #define MOTOR_WARNING_BIT 0
788 #endif
789 
790 #ifndef CONTROL_MASK
791 #define CONTROL_MASK (RESET_BIT|FEED_HOLD_BIT|CYCLE_START_BIT|PROBE_DISCONNECT_BIT|STOP_DISABLE_BIT|BLOCK_DELETE_BIT|SINGLE_BLOCK_BIT|MOTOR_FAULT_BIT|MOTOR_WARNING_BIT)
792 #define CONTROL_MASK_SUM (RESET_BIT+FEED_HOLD_BIT+CYCLE_START_BIT+PROBE_DISCONNECT_BIT+STOP_DISABLE_BIT+BLOCK_DELETE_BIT+SINGLE_BLOCK_BIT+MOTOR_FAULT_BIT+MOTOR_WARNING_BIT)
793 #endif
794 
795 #endif // STM32_PLATFORM
796 
797 // Auxiliary input signals
798 
799 #ifdef AUXINPUT0_PIN
800 #define AUXINPUT0_BIT (1<<AUXINPUT0_PIN)
801 #else
802 #define AUXINPUT0_BIT 0
803 #endif
804 #ifdef AUXINPUT1_PIN
805 #define AUXINPUT1_BIT (1<<AUXINPUT1_PIN)
806 #else
807 #define AUXINPUT1_BIT 0
808 #endif
809 #ifdef AUXINPUT2_PIN
810 #define AUXINPUT2_BIT (1<<AUXINPUT2_PIN)
811 #else
812 #define AUXINPUT2_BIT 0
813 #endif
814 #ifdef AUXINPUT3_PIN
815 #define AUXINPUT3_BIT (1<<AUXINPUT3_PIN)
816 #else
817 #define AUXINPUT3_BIT 0
818 #endif
819 #ifdef AUXINPUT4_PIN
820 #define AUXINPUT4_BIT (1<<AUXINPUT4_PIN)
821 #else
822 #define AUXINPUT4_BIT 0
823 #endif
824 #ifdef AUXINPUT5_PIN
825 #define AUXINPUT5_BIT (1<<AUXINPUT5_PIN)
826 #else
827 #define AUXINPUT5_BIT 0
828 #endif
829 #ifdef AUXINPUT6_PIN
830 #define AUXINPUT6_BIT (1<<AUXINPUT6_PIN)
831 #else
832 #define AUXINPUT6_BIT 0
833 #endif
834 #ifdef AUXINPUT7_PIN
835 #define AUXINPUT7_BIT (1<<AUXINPUT7_PIN)
836 #else
837 #define AUXINPUT7_BIT 0
838 #endif
839 #ifdef AUXINPUT8_PIN
840 #define AUXINPUT8_BIT (1<<AUXINPUT8_PIN)
841 #else
842 #define AUXINPUT8_BIT 0
843 #endif
844 #ifdef AUXINPUT9_PIN
845 #define AUXINPUT9_BIT (1<<AUXINPUT9_PIN)
846 #else
847 #define AUXINPUT9_BIT 0
848 #endif
849 #ifdef AUXINPUT10_PIN
850 #define AUXINPUT10_BIT (1<<AUXINPUT10_PIN)
851 #else
852 #define AUXINPUT10_BIT 0
853 #endif
854 #ifdef AUXINPUT11_PIN
855 #define AUXINPUT11_BIT (1<<AUXINPUT11_PIN)
856 #else
857 #define AUXINPUT11_BIT 0
858 #endif
859 #ifdef AUXINPUT12_PIN
860 #define AUXINPUT12_BIT (1<<AUXINPUT12_PIN)
861 #else
862 #define AUXINPUT12_BIT 0
863 #endif
864 #ifdef AUXINPUT13_PIN
865 #define AUXINPUT13_BIT (1<<AUXINPUT13_PIN)
866 #else
867 #define AUXINPUT13_BIT 0
868 #endif
869 #ifdef AUXINPUT14_PIN
870 #define AUXINPUT14_BIT (1<<AUXINPUT14_PIN)
871 #else
872 #define AUXINPUT14_BIT 0
873 #endif
874 #ifdef AUXINPUT15_PIN
875 #define AUXINPUT15_BIT (1<<AUXINPUT15_PIN)
876 #else
877 #define AUXINPUT15_BIT 0
878 #endif
879 
880 #ifndef AUXINPUT_MASK
881 #define AUXINPUT_MASK (AUXINPUT0_BIT|AUXINPUT1_BIT|AUXINPUT2_BIT|AUXINPUT3_BIT|AUXINPUT4_BIT|AUXINPUT5_BIT|AUXINPUT6_BIT|AUXINPUT7_BIT|\
882  AUXINPUT8_BIT|AUXINPUT9_BIT|AUXINPUT10_BIT|AUXINPUT11_BIT|AUXINPUT12_BIT|AUXINPUT13_BIT|AUXINPUT14_BIT|AUXINPUT15_BIT)
883 #define AUXINPUT_MASK_SUM (AUXINPUT0_BIT+AUXINPUT1_BIT+AUXINPUT2_BIT+AUXINPUT3_BIT+AUXINPUT4_BIT+AUXINPUT5_BIT+AUXINPUT6_BIT+AUXINPUT7_BIT+\
884  AUXINPUT8_BIT+AUXINPUT9_BIT+AUXINPUT10_BIT+AUXINPUT11_BIT+AUXINPUT12_BIT+AUXINPUT13_BIT+AUXINPUT14_BIT+AUXINPUT15_BIT)
885 #endif
886 
887 /*EOF*/
const char * xbar_fn_to_pinname(pin_function_t fn)
Definition: crossbar.c:177
@ Input_QEI_A
Definition: crossbar.h:341
@ Input_FeedHold
Definition: crossbar.h:46
@ Input_Toolsetter
Definition: crossbar.h:75
@ Output_StepperEnableV
Definition: crossbar.h:232
@ Input_Reset
Definition: crossbar.h:45
@ Output_CoProc_Boot0
Definition: crossbar.h:315
@ Input_Probe
Definition: crossbar.h:59
@ Output_StepperEnableX
Definition: crossbar.h:222
@ Input_MotorFault
Definition: crossbar.h:53
@ Input_Probe2
Definition: crossbar.h:73
@ Input_MotorWarning
Definition: crossbar.h:54
@ Input_ToolsetterOvertravel
Definition: crossbar.h:57
@ Input_ProbeDisconnect
Definition: crossbar.h:52
@ Input_EStop
Definition: crossbar.h:51
@ Input_StopDisable
Definition: crossbar.h:50
@ Output_StepperEnableXY
Definition: crossbar.h:234
@ Input_LimitsOverride
Definition: crossbar.h:55
@ Output_CoProc_Reset
Definition: crossbar.h:314
@ Output_StepperEnableZ
Definition: crossbar.h:226
@ Input_QEI_Select
Definition: crossbar.h:343
@ Output_StepperEnableU
Definition: crossbar.h:231
@ Output_StepperEnableA
Definition: crossbar.h:228
@ Output_StepperEnableY2
Definition: crossbar.h:225
@ Input_BlockDelete
Definition: crossbar.h:49
@ Output_StepperEnable
Definition: crossbar.h:220
@ Output_SpindleDir
Definition: crossbar.h:237
@ Output_StepperEnableY
Definition: crossbar.h:224
@ Output_StepperEnableC
Definition: crossbar.h:230
@ Input_SingleBlock
Definition: crossbar.h:56
@ Output_SPIRST
Definition: crossbar.h:329
@ Output_SpindleOn
Definition: crossbar.h:236
@ Input_I2CStrobe
Definition: crossbar.h:336
@ Output_Spindle1Dir
Definition: crossbar.h:240
@ Output_SpindlePWM
Definition: crossbar.h:238
@ Output_CoolantMist
Definition: crossbar.h:242
@ Input_MPGSelect
Definition: crossbar.h:76
@ Output_Spindle1On
Definition: crossbar.h:239
@ Input_QEI_B
Definition: crossbar.h:342
@ Output_StepperEnableB
Definition: crossbar.h:229
@ Input_CycleStart
Definition: crossbar.h:47
@ Input_SafetyDoor
Definition: crossbar.h:48
@ Output_CoolantFlood
Definition: crossbar.h:243
@ Output_StepperEnableX2
Definition: crossbar.h:223
@ Output_StepperEnableZ2
Definition: crossbar.h:227
@ Output_Spindle1PWM
Definition: crossbar.h:241
pin_irq_mode_t
Pin interrupt modes, may be or'ed when reporting pin capability.
Definition: crossbar.h:697
@ IRQ_Mode_Rising
0b00001 (0x01)
Definition: crossbar.h:699
@ IRQ_Mode_RisingFalling
0b00011 (0x03) - only used to report port capability.
Definition: crossbar.h:701
@ IRQ_Mode_None
0b00000 (0x00)
Definition: crossbar.h:698
@ IRQ_Mode_Change
0b00100 (0x04)
Definition: crossbar.h:702
@ IRQ_Mode_Falling
0b00010 (0x02)
Definition: crossbar.h:700
#define SPINDLE_ENABLE
Definition: driver_opts.h:345
#define SPINDLE1_ENABLE
Definition: driver_opts.h:317
#define COOLANT_FLOOD
Definition: driver_opts.h:300
#define COOLANT_MIST
Definition: driver_opts.h:301
#define SPINDLE_PWM
Definition: driver_opts.h:309
@ WaitMode_Immediate
0 - This is the only mode allowed for analog inputs
Definition: gcode.h:311
DCRAM grbl_hal_t hal
Global HAL struct.
Definition: grbllib.c:91
FLASHMEM xbar_t * ioport_claim(io_port_type_t type, io_port_direction_t dir, uint8_t *port, const char *description)
Claim a digital or analog port for exclusive use.
Definition: ioports.c:321
FLASHMEM bool ioport_set_function(xbar_t *pin, pin_function_t function, driver_caps_t caps)
Set pin function.
Definition: ioports.c:397
FLASHMEM bool ioports_enumerate(io_port_type_t type, io_port_direction_t dir, pin_cap_t filter, ioports_enumerate_callback_ptr callback, void *data)
Enumerate ports.
Definition: ioports.c:563
@ Port_Input
0
Definition: ioports.h:34
@ Port_Output
1
Definition: ioports.h:35
bool(* ioports_enumerate_callback_ptr)(xbar_t *properties, uint8_t port, void *data)
Definition: ioports.h:161
@ Port_Digital
1
Definition: ioports.h:30
#define IOPORT_UNASSIGNED
Definition: ioports.h:26
void(* ioport_interrupt_callback_ptr)(uint8_t port, bool state)
Pointer to callback function for input port interrupt events.
Definition: ioports.h:142
#define On
Definition: nuts_bolts.h:36
#define add_aux_input_scan(fn, irq, signal_bit)
Definition: pin_bits_masks.h:126
#define add_aux_input(fn, aux, irq, signal_bit)
Definition: pin_bits_masks.h:119
bool(* aux_claim_explicit_ptr)(aux_ctrl_t *aux_ctrl)
Definition: pin_bits_masks.h:331
#define add_aux_output(fn, aux)
Definition: pin_bits_masks.h:124
bool(* aux_claim_explicit_out_ptr)(aux_ctrl_out_t *aux_ctrl)
Definition: pin_bits_masks.h:580
#define add_aux_input_no_signal(fn, irq)
Definition: pin_bits_masks.h:128
#define add_aux_output_exp(fn, aux)
Definition: pin_bits_masks.h:129
#define add_aux_motor_input(fn, motor, aux, irq)
Definition: pin_bits_masks.h:127
#define EXPANDER_PORT
Definition: pin_bits_masks.h:56
settings_t settings
Definition: settings.c:48
Definition: crossbar.h:880
uint8_t port
Auxiliary port number, post claimed.
Definition: crossbar.h:882
void * output
Pointer to the driver input array entry for the pin.
Definition: crossbar.h:884
Definition: crossbar.h:870
pin_irq_mode_t irq_mode
Required IRQ mode for the input.
Definition: crossbar.h:873
control_signals_t signal
Set to the pin the input maps to, 0 if none.
Definition: crossbar.h:874
uint8_t port
Auxiliary port number, post claimed.
Definition: crossbar.h:872
void * input
Pointer to the driver input array entry for the pin.
Definition: crossbar.h:876
aux_gpio_t gpio
MCU port base address (may be NULL) and pin number.
Definition: crossbar.h:875
pin_function_t function
Pin function.
Definition: crossbar.h:871
Definition: crossbar.h:865
uint8_t pin
MCU pin number.
Definition: crossbar.h:867
void * port
MCU port address (may be NULL).
Definition: crossbar.h:866
io_port_t port
Optional handlers for axuillary I/O (adds support for M62-M66).
Definition: hal.h:659
control_signals_t signals_cap
Control input signals supported by the driver.
Definition: hal.h:694
wait_on_input_ptr wait_on_input
Optional handler for reading a digital or analog input.
Definition: ioports.h:171
ioport_register_interrupt_handler_ptr register_interrupt_handler
Definition: ioports.h:176
Definition: settings.h:881
control_signals_t control_invert
Definition: settings.h:893
Definition: crossbar.h:887
xbar_set_value_ptr set_value
Optional pointer to function to set port value.
Definition: crossbar.h:899
uint_fast8_t pin
Pin number.
Definition: crossbar.h:894
pin_function_t function
Pin function.
Definition: crossbar.h:890
void * port
Optional pointer to the underlying peripheral or pin specific data.
Definition: crossbar.h:892
Definition: nuts_bolts.h:416
uint16_t mask
Definition: nuts_bolts.h:418
Definition: crossbar.h:755
uint32_t irq_mode
pin_irq_mode_t - IRQ modes
Definition: crossbar.h:762